Error Correction Methods of Low-precision Analog Matrix Processors for High-precision Matrix Multiplications

Abstract

Low-precision analog matrix processors using optical
and other analog technologies are attracting attention
in applications such as AI inference. However, little research
has been conducted on analog computing, which enables highprecision
matrix calculations using single-precision floatingpoint
numbers (FP32) or double-precision floating-point numbers
(FP64), commonly used in scientific and engineering calculations.
In this report, we present a method for achieving high-precision
matrix multiplications by using analog processors, applying
the Ozaki scheme, which enables high-precision floating-point
calculations using low-precision analog processors. This method
also introduces redundancy at the algorithm level, enabling
error detection and correction in the results. Evaluation results
show that, assuming an optical accelerator, the proposed method
has the potential to achieve effective performance of over 2.5
TFLOPS and a sufficiently low error rate for high-precision FP64
matrix calculations on the cutting-edge optical-computer model.